Berlin · Angel round · 2026
Software to design, build and validate hardware faster.
The agentic co-worker for electrical engineers. Superpowers for component selection, schematic design, and board bring-up.
5 pilot users live (August 2026) · Raising €500k angel round
Download deck
Tom Elliot · tom@coscope.ai
01 - The problem
Every board revision burns the most expensive time in hardware.
$50,000
in scrapped boards
1 month
lost
15-20
engineers blocked
The cost of one unconnected power rail missed in schematic review.
Senior EE (ex-Meta, ex-Fitbit), discovery interview, July 2026
- • First-spin boards rarely work: teams plan for multiple respins per product. One audio company's 7 EEs ship 12-13 products a year through this cycle.
- • Each revision consumes 20-40 senior-EE hours at $150-300/hr on bring-up and debug.
- • Until the board is validated, all downstream firmware work stalls. Engineers wait weeks just to power on a board.
- • For funded teams the delay is the cost, not the dollars. A schematic error costs 2-3 weeks of China turnaround - "almost months" once it compounds. "We have to increase our shots on goal." - CTO, venture-backed neurotech startup.
02 - The customer
Venture-backed robotics, drone, and aerospace companies building custom electronics with almost no EE bench.
1,416
robotics companies
3,000
open hardware-engineering roles
Robotics Registry, 2026. Robotics only; drone and aerospace companies come on top.
- • 1-3 electrical engineers, often one, sometimes none. A humanoid-robotics company ran 13+ months on a single EE; a 3-person team that raised $50M has no EE at all - a mechatronics engineer makes it happen.
- • Small by design: more than half are under 50 people. The designer is alone with the risk, with no second engineer to review the schematic, check contractor output, or answer FAE-grade component questions.
- • The budget already exists. >800 venture-funded companies holding $80B+ in venture capital, hiring EEs at $150k+ fully loaded for roles that sit open. A coscope seat costs a tenth of the hire they can't make.
- • AI-native, but loyal to their CAD. These teams already run agentic AI and are actively looking for more of it. Schematic capture and PCB layout stay in the best-in-class tools (Altium, Cadence OrCAD); coscope works alongside them, never asks them to switch.
Not the customer: companies that outsource electronics design, and legacy automotive/industrial teams with entrenched process.
03 - The solution
coscope reverses the math on every board revision.
Bring-up to application in ~2 weeks instead of 2-3 months
The agent reads the design, drives console and debugger, and writes the firmware to exercise the board.
Design reviews that catch what rubber stamps miss
Schematic and layout checked component by component against datasheets: the class of error behind the $50k respin.
8 hours of constraint entry becomes minutes
Design intent (trace currents, voltage ranges, impedances) encoded into the CAD tool by the agent.
EEs stop waiting on firmware
Boards get validated the day they arrive, so downstream software work starts weeks earlier.
The mundane goes to the agent; the judgment stays with the engineer
Context building, datasheet gathering, constraint entry, documentation - not the puzzle EEs love.
Works alongside Altium, KiCad, and Cadence. Nothing to rip out.
The method is proven: in a trillion-dollar tech company's internal evaluation, checking a schematic component by component against datasheets caught 100% of injected errors. Naive prompting caught 5-10%.
04 - Traction
Product in users' hands.
- • 5 pilot users onboarded, August 2026 - an installable product running on real projects: a board mid-layout, a board entering production in China, a neurotech test program, consumer audio shipping 12-13 products a year, an access-control product with 90 boards in the field, a robotics consultancy.
- • Paid conversion built in: pilots run free for the first months, then convert to paid seats - terms already accepted verbally.
- • Robotics pipeline behind them: a drone flight-controller pilot starts 4 September; engineers at two robotics companies are personally committed, working organizational sign-off.
- • 25+ discovery interviews with senior EEs and engineering leaders across robotics, defense, aerospace, consumer audio, neurotech, and hardware consulting.
- • Investors are already sourcing customers: several of the pilots referred by VCs interested in coscope.
"Really good start… you're onto something."
"There's not really any tool for this that I've discovered."
05 - Why me
20 years taking hardware from lab bench to factory line.
Tom Elliot - Founder
- • Fitbit: built the industry's first all-day wrist-worn heart-rate sensor (Surge); Sensor Systems Lead, Ionic. Tens of millions of units sold on hardware I developed.
- • INFARM: Head of Hardware Engineering, team of 12. The equipment my team designed carried tens of millions of € in deployed capital.
- • Senic: Head of Engineering, shipped connected consumer hardware.
- • FluidSEO: bootstrapped B2B SaaS to $3k MRR at 95% margin. Runs on about an hour a month, 3 years and counting.
The insight: AI-EDA startups build where software founders are comfortable: the design file. The expensive failures happen at the bench. coscope exists because I've carried the board from schematic to factory line, and the tools have big gaps that lead to costly mistakes.
06 - Business model
$1,200 per engineer per month.
Annual SaaS seat, sold to the engineering lead. Design partners get their first months free, then 50% pricing ($600/mo) locked for their first year.
Payback in one catch
A routine board revision burns $3k-12k of senior-EE time; the $50k respin from the problem slide would have paid for the seat for 3 years.
Buyers are already shopping — and walking
$5k for a layout-only board spin, declined; $10k/year for a single workflow slice, declined. The budget exists; single-stage tools don't clear the bar. coscope prices the whole workflow, not a slice: $14.4k/year.
$72k/year per 5-EE team
And seats expand as the team hires (3,000 open roles in the segment).
3 design partners = the seed benchmark
Each at 2+ seats clears 5-figure ARR before the priced round.
07 - Market
$1.8B/year: what teams already pay to design PCBAs.
PCB design-software revenue, 2025, growing every quarter.
The tooling covers the drawing; the labor costs 5-10× more. An ECAD seat runs $2-9k/year, while the engineer behind it burns $10-75k/year on bring-up, debug, and review. coscope reprices the same seats against the labor, not the license.
The high end is priced out of reach: PCB-level simulation needs a ~$500k/year Cadence licence. Small teams go without - so did Apple's Mac group, per an ex-Apple founder.
Beachhead
$40M ARR in venture-backed robotics
1,416 robotics companies worldwide (before drones and aerospace) × 2 EE seats × $14,400/year. 3,000 open hardware roles signal the segment's growth.
08 - Why now
New buyers, busy incumbents, capital validating the adjacent layer - and investors waiting for the team.
-
1
The buyer is new. 500+ robotics companies have been founded since 2021, and they already hold $20B+ in venture funding. They design electronics in-house without entrenched process and can't staff it: 3,000 open hardware-engineering roles.
-
2
The incumbents are busy consolidating. Over $40B of EDA M&A since 2024: Synopsys-Ansys $35B, Cadence-Hexagon €2.7B, Renesas-Altium $5.9B (~22× revenue). Their energy is going into integration and seat repricing, not new workflows.
-
3
Capital has validated the adjacent layer. $100M+ has gone into AI tools for board design (Quilter $40M, Flux $49M). Every one of them starts long after the design process has begun and stops before the hardware is built.
-
4
Investors have seen the market - not the team. A €80M European pre-seed fund: seen many PCB/hardware design companies, invested in none - "right market, wrong teams so far" - and called coscope "differentiated vs the prompt-to-hardware approaches we've seen."
09 - Competition
Everyone stops before the bench.
Design-AI startups
Quilter ($40M), Flux ($49M), Diode, Schematic
AI-assisted layout & schematic
Where they miss: no support on architecture and component selection. Never touch the physical board.
Single-slice entrants (YC cohort)
Bootloop, Embedder, HILstart
One workflow slice each: firmware, embedded software, a bring-up test box
Where they miss: each holds one stage. No shared context across the workflow.
EDA incumbents
Cadence, Siemens, Altium/Renesas
Simulation + in-tool AI
Where they miss: no support on architecture and component selection. Never touch the physical board.
Instrument vendors
Keysight, R&S, Tektronix
Per-instrument AI features
Where they miss: no support on architecture and component selection. No support on design.
| Who | What they sell | Where they miss |
|---|---|---|
|
Design-AI startups: Quilter ($40M), Flux ($49M), Diode, Schematic |
AI-assisted layout & schematic |
No support on architecture and component
selection. Never touch the physical board. |
|
Single-slice entrants (YC cohort): Bootloop, Embedder, HILstart |
One workflow slice each: firmware, embedded software, a bring-up test box |
Each holds one stage. No shared context across the workflow. |
|
EDA incumbents: Cadence, Siemens, Altium/Renesas |
Simulation + in-tool AI |
No support on architecture and component
selection. Never touch the physical board. |
|
Instrument vendors: Keysight, R&S, Tektronix |
Per-instrument AI features |
No support on architecture and component
selection. No support on design. |
coscope closes the loop others can't: design files + firmware + bench instruments, one agent, any vendor's hardware. Everyone else picks one slice of the workflow; coscope carries context across the whole lifecycle - architecture decisions are still available at layout and bring-up, instead of scattered across Jira and the schematic.
Every bring-up session becomes structured design-vs-reality data: what was designed, what the board actually did, and what fixed it. Nobody else in the industry captures that record - it exists only because coscope exists.
10 - The ask
€500k: rolling SAFE, first close October 2026.
6 months of runway to the seed bar: 3+ paying design partners at 5-figure ARR and a closed loop from schematic to running application.
20% product & AI compute
The agent does the engineering; we buy compute instead of headcount.
20% reference build program
A new board every month through the full loop, with the journal published end to end. Each build hardens the product and markets it at the same time.
20% pilot conversion & founder-led sales
5 live pilots into paying design partners.
20% operations · 20% reserve
The reserve means the seed closes on our terms.
Non-dilutive leverage: German R&D grants (FZul 35% / ZIM 50% funding rates) recover 35-50% of eligible costs - up to €250k back on the €500k raised.
By the seed: 3+ paying design partners · 3+ published reference builds
Appendix - Source register
Every number on these slides, sourced.
- • Respin cost, constraint-entry hours, bring-up quotes: founder discovery interviews, February-August 2026 (25+ senior EEs and engineering leaders; robotics, defense, aerospace, consumer audio, neurotech, consulting). Respin detail: $500+/assembled board × ~100 boards; firmware team of 15-20 blocked on critical path.
- • Delay-not-dollars framing, 2-3 week China turnaround per caught error: discovery interview with the CTO of a venture-backed neurotech startup (22 PCBs in 3 months), July 2026. $50M-raised team with no EE: accelerator screening call, July 2026.
- • Pilot onboarding, terms, and quotes: founder pilot calls, August 2026 (installable product, macOS/Linux + KiCad). Pilot cohort: audio consultancy (ex-ADAM Audio senior EE), freelance neurotech EE, consumer audio EE (€200M-revenue company), IoT access-control co-founder (90 boards in field), hardware/firmware consultancy.
- • Investor-referred pilot: Angel Invest partner introduction, July 2026. Drone flight-controller pilot (starts 4 September 2026): pilot agreement call, August 2026.
- • Robotics segment: Robotics Registry (roboticsregistry.net), 2026. 1,416 companies, 3,000 open roles; global, robotics-only. Segment statistics (founding years, team sizes, funding stages/amounts): founder analysis of registry company-level data (n=1,416; underlying funding rounds cite SEC filings and press per company).
- • EE cost: US Bureau of Labor Statistics, May 2024 (median electrical engineer salary $111,910; $150k+ fully loaded).
- • PCB design-software market: ESD Alliance Electronic Design Market Data, published by SEMI. PCB & MCM segment, quarterly reports 2025 (~$1.78B FY2025).
- • Quilter $5k/board-spin quote (declined): pilot user (hardware/firmware consultancy), July 2026. Bootloop $10k/year "too expensive for startups": discovery interview, June 2026.
- • Cadence PCB-simulation licence ~$500k/yr: discovery interview with the founder of a profitable hardware company (ex-Apple), July 2026.
- • Synopsys-Ansys ($34.9B, closed 17 Jul 2025): Synopsys press release / SEC Form 8-K.
- • Cadence-Hexagon D&E (€2.7B, announced Sep 2025, closed 23 Feb 2026): Cadence and Hexagon press releases.
- • Renesas-Altium (A$9.1B ≈ US$5.9B, closed 1 Aug 2024): Renesas and Altium press releases.
- • Quilter funding ($40M total; $25M Series B, Oct 2025): Business Wire.
- • Flux funding ($12M seed, TechCrunch 2021; $37M Series B, SiliconANGLE Feb 2026).
- • Single-slice entrants: Bootloop and Embedder identified independently by a VC's diligence, July 2026; HILstart (YC, met founder July 2026); Diode: discovery interview, July 2026.
- • Injected-error evaluation (100% vs 5-10% detection): discovery interview with EE lead at a trillion-dollar tech company, 2026.
- • "Right market, wrong teams so far": partner call with a €80M European pre-seed fund, July 2026.
- • German grant rates (FZul 35%, ZIM 50%; approval rates ~70%/~62%): advisory call with FUNDED (getfunded.de), August 2026.